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Author SHA1 Message Date
Jean-Marc Valin
aca04ce269
Default to int8 matrix multiplies when available 2023-10-17 01:52:32 -04:00
Jean-Marc Valin
ca035ef1d2
Force Deep PLC on when enabling DRED 2023-10-16 16:57:21 -04:00
Jean-Marc Valin
da2121abff
Default Deep PLC/DRED to off 2023-10-15 03:43:42 -04:00
Jean-Marc Valin
6ea9312a93
Only compile PLC/DRED conditionally 2023-10-15 03:39:40 -04:00
Jean-Marc Valin
9ed3c7c982
Rename ENABLE_NEURAL_FED to ENABLE_DRED 
Signed-off-by: Jean-Marc Valin <jmvalin@amazon.com>
 2023-10-15 02:55:01 -04:00
Jean-Marc Valin
5c24975c3a
Rename NEURAL_PLC to ENABLE_DEEP_PLC 
Signed-off-by: Jean-Marc Valin <jmvalin@amazon.com>
 2023-10-15 02:54:55 -04:00
Jean-Marc Valin
dd3ec4fab3
No longer need to force custom modes 2023-06-19 14:01:38 -04:00
Jean-Marc Valin
e9dc5d1793
Make AVX2 test actually include AVX2 and FMA 2023-06-16 13:02:28 -04:00
Jean-Marc Valin
87427377cd
fix AVX2 compile option 2023-06-16 13:02:28 -04:00
Jean-Marc Valin
9a2c0e34ca
Detect AVX/AVX2/FMA instead of just AVX 2023-06-16 13:02:27 -04:00
Jean-Marc Valin
8dc345fe59
Fix whitespace errors 2023-06-16 13:02:17 -04:00
Jean-Marc Valin
094eaf8bf8
Reenable dot product instructions 2023-06-16 13:01:28 -04:00
Jan Buethe
0ba6458ba1
added --enable-neural-fec option to configure 2023-06-16 13:01:18 -04:00
Jan Buethe
2df55d3583
added dred encoder to silk encoder 2023-06-16 13:01:14 -04:00
Jean-Marc Valin
a674f84a7c
enable neural PLC by default 2023-06-16 13:01:13 -04:00
Jean-Marc Valin
09f7f82ca6
Bump LT version 
Added OPUS_SET_INBAND_FEC(2) since previous version
 2023-04-17 22:50:28 -04:00
Timothy B. Terriberry
0808841125
Only build platform RTCD sources when enabled. 
To avoid issues with empty compilation units.
 2022-07-09 21:18:52 -07:00
Timothy B. Terriberry
918a09a344
Update x86 CPU detection configure check. 
Commit 6577534a80 switched from using __get_cpuid() to
 __get_cpuid_count(), but the corresponding configure check was not
 updated.
Since __get_cpuid_count() was introduced much later, make sure we
 check for the function we actually use.

Thanks to Mark Harris for the report.
 2022-07-06 09:59:12 -07:00
sezero
484af2580b
configure: adjust x86 get cpu info inline assembly method for PIC case 
.. just like the way it is done in celt/x86/x86cpu.c.

Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>
 2020-07-07 23:10:17 -04:00
Jean-Marc Valin
e85ed7726d
Bump LT version 
Adding the OPUS_GET_IN_DTX() query
 2019-04-12 16:26:57 -04:00
Jean-Marc Valin
83d5155f15
Bump LT version numbers 
We're adding the ambisonics API
 2018-10-16 19:44:13 -04:00
Jean-Marc Valin
c6d977a966
Clarify configure --help 2018-09-14 13:13:13 -04:00
Jean-Marc Valin
722a66b84b
Remove ambisonics experimental flag 2018-07-26 19:49:35 -04:00
Jean-Marc Valin
ac044500cc
Enable ambisonics by default 2018-07-26 09:56:12 -04:00
Jean-Marc Valin
2c0061c19b
Enable hardening by default 2018-07-26 01:01:33 -04:00
Jean-Marc Valin
ef203135b4
Adding ENABLE_HARDENING 
Enables "safes" assertions even with ENABLE_ASSERTIONS isn't set
 2018-03-27 15:13:25 -04:00
Jean-Marc Valin
e1c0770a49
Don't enable -fstack-protector-strong on Windows for now 
It adds a libssp-0.dll dependency and prevents static linking
 2018-03-02 15:08:21 -05:00
Jean-Marc Valin
610c14ce80
Adding -D_FORTIFY_SOURCE=2 when possible 2018-02-22 17:18:57 -05:00
Jean-Marc Valin
76d966f436
Enable -fstack-protector-strong by default on x86 
The size overhead seems to be about 1% and the speed overhead is
"in the noise" (<2%).
The automake code is copied from opus-tools
 2018-02-22 15:51:25 -05:00
Jean-Marc Valin
d8b1fd4ad0
Enable RFC 8251 changes by default 2017-10-29 01:01:35 -04:00
Ralph Giles
9f7e7c8ce0 Fix configure output formatting. 
Put the colon ':' before the continuation dots like all the
other entries.
 2017-10-23 12:50:14 -07:00
Alexander Kochetkov
ec29ffd944
Fix typo with NE10 prefix 
Prefix passed using '--with-NE10=PFX' not used as NE10 include path.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Signed-off-by: Ralph Giles <giles@thaumas.net>
 2017-09-11 09:18:54 -07:00
Jean-Marc Valin
defbc370ec
bump LT revision 2017-06-26 14:04:09 -04:00
Jean-Marc Valin
352786c9cb
bump LT version numbers 2017-06-19 16:32:23 -04:00
Michael Bradshaw
c930cc57d2
Reduce the scope of Ne10 includes 
libopus only uses the DSP module of Ne10, and never uses the init functions.

Signed-off-by: Michael Bradshaw <mjbshaw@google.com>
Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>
 2017-02-15 16:54:06 -05:00
Felicia Lim
32b302c495
Add --enable-check-asm 
Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>
 2017-01-23 13:22:27 -05:00
Mark Harris
aef475641a
configure: Improve error message 2017-01-18 00:13:37 -08:00
Chris Rudmin
19b13443b3 Fix error message 
Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
 2017-01-09 11:23:58 -08:00
Jean-Marc Valin
80052fe3cc
Fixes NE10 configure problem 
As reported by agatx in https://trac.xiph.org/ticket/2291
 2016-11-01 18:41:23 -04:00
Ralph Giles
76fa939bde Make use of dot optional in generating documentation. 
Different distributions of doxygen have different default
values of HAVE_DOT setting, so we need to pick a specific
setting to avoid 'missing dot' warnings on some platforms.

Doxygen uses it to generate inclusion graphs for our various
header files, which is somewhat useful, but not essential.
We therefore enable dot if it's present (usually through
the parent graphviz package) but disable it if it's not
available, silencing the warning, but not giving uniform
results.
 2016-10-27 10:53:27 -07:00
Jean-Marc Valin
12fb15f42b
Add configure option --enable-update-draft 2016-08-31 13:39:59 -04:00
Jean-Marc Valin
03fb50eb37 bump OPUS_LT_REVISION 2016-07-08 14:20:05 -04:00
Timothy B. Terriberry
096f5d3769 Remove tabs from source code. 
There are no tabs in source code.
 2016-07-06 15:00:02 -07:00
Jonathan Lennox
879736037b Add configure check for Aarch64-specific Neon intrinsics. 
Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
 2016-07-06 15:00:02 -07:00
Jonathan Lennox
87c670dbe1 Clean up formatting of configure output for ARM intrinsics detection. 
This makes it match the formatting of the output for ARM assembly
better, and removes some redundant repetition of the word
"intrinsics".  It also fixes the output if a compiler supports RTCD
for Neon intrinsics but not assembly.

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
 2016-07-06 15:00:02 -07:00
Jonathan Lennox
92f9c82a8a Clean up some intrinsics-related wording in configure. 
Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
 2016-07-06 15:00:02 -07:00
Jonathan Lennox
6d27902343 Enable intrinsics by default. 
Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
 2016-07-06 15:00:02 -07:00
Jonathan Lennox
920ff71814 Enable Neon intrinsics for aarch64. 
Enables existing Neon intrinsic optimizations to work on aarch64
targets.

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
 2016-07-06 15:00:01 -07:00
Jonathan Lennox
8cb1487288 Rename OPUS_ARM_NEON_INTR AM_CONDITIONAL as HAVE_ARM_NEON_INTR, for consistency with x86. 
Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
 2016-07-06 15:00:01 -07:00
Michael Graczyk
3925668bbb Add experimental support for ambisonic encoding 
The implementation currently only codes each channel independently with no
special allocation rules.

Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>
 2016-06-29 14:25:30 -04:00