add stac/rdseed
This commit is contained in:
parent
a45d11f467
commit
b7a684637d
6 changed files with 15 additions and 3 deletions
|
@ -518,6 +518,7 @@ void put()
|
||||||
|
|
||||||
{ "popf", B10011101 },
|
{ "popf", B10011101 },
|
||||||
{ "pushf", B10011100 },
|
{ "pushf", B10011100 },
|
||||||
|
{ "stac", 0x0F, 0x01, 0xCB },
|
||||||
|
|
||||||
{ "vzeroall", 0xC5, 0xFC, 0x77 },
|
{ "vzeroall", 0xC5, 0xFC, 0x77 },
|
||||||
{ "vzeroupper", 0xC5, 0xF8, 0x77 },
|
{ "vzeroupper", 0xC5, 0xF8, 0x77 },
|
||||||
|
|
|
@ -50,6 +50,9 @@ void putCPUinfo()
|
||||||
{ Cpu::tENHANCED_REP, "enh_rep" },
|
{ Cpu::tENHANCED_REP, "enh_rep" },
|
||||||
{ Cpu::tRDRAND, "rdrand" },
|
{ Cpu::tRDRAND, "rdrand" },
|
||||||
{ Cpu::tADX, "adx" },
|
{ Cpu::tADX, "adx" },
|
||||||
|
{ Cpu::tRDSEED, "rdseed" },
|
||||||
|
{ Cpu::tSMAP, "smap" },
|
||||||
|
{ Cpu::tHLE, "hle" },
|
||||||
};
|
};
|
||||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||||
if (cpu.has(tbl[i].type)) printf(" %s", tbl[i].str);
|
if (cpu.has(tbl[i].type)) printf(" %s", tbl[i].str);
|
||||||
|
|
|
@ -372,6 +372,7 @@ class Test {
|
||||||
|
|
||||||
"popf",
|
"popf",
|
||||||
"pushf",
|
"pushf",
|
||||||
|
"stac",
|
||||||
|
|
||||||
"xgetbv",
|
"xgetbv",
|
||||||
"vzeroall",
|
"vzeroall",
|
||||||
|
@ -2035,6 +2036,7 @@ public:
|
||||||
void putGprOtherwise()
|
void putGprOtherwise()
|
||||||
{
|
{
|
||||||
put("rdrand", REG16 | REG32e);
|
put("rdrand", REG16 | REG32e);
|
||||||
|
put("rdseed", REG16 | REG32e);
|
||||||
put("rorx", REG32, REG32 | MEM, IMM8);
|
put("rorx", REG32, REG32 | MEM, IMM8);
|
||||||
#ifdef XBYAK64
|
#ifdef XBYAK64
|
||||||
put("rorx", REG64, REG64 | MEM, IMM8);
|
put("rorx", REG64, REG64 | MEM, IMM8);
|
||||||
|
|
|
@ -1996,6 +1996,7 @@ public:
|
||||||
opModRM(reg, op, op.isREG(), op.isMEM(), 0x0F, 0x38, 0xF0 | (op.isBit(8) ? 0 : 1));
|
opModRM(reg, op, op.isREG(), op.isMEM(), 0x0F, 0x38, 0xF0 | (op.isBit(8) ? 0 : 1));
|
||||||
}
|
}
|
||||||
void rdrand(const Reg& r) { if (r.isBit(8)) throw Error(ERR_BAD_SIZE_OF_REGISTER); opModR(Reg(6, Operand::REG, r.getBit()), r, 0x0f, 0xc7); }
|
void rdrand(const Reg& r) { if (r.isBit(8)) throw Error(ERR_BAD_SIZE_OF_REGISTER); opModR(Reg(6, Operand::REG, r.getBit()), r, 0x0f, 0xc7); }
|
||||||
|
void rdseed(const Reg& r) { if (r.isBit(8)) throw Error(ERR_BAD_SIZE_OF_REGISTER); opModR(Reg(7, Operand::REG, r.getBit()), r, 0x0f, 0xc7); }
|
||||||
void rorx(const Reg32e& r, const Operand& op, uint8 imm) { opGpr(r, op, Reg32e(0, r.getBit()), MM_0F3A | PP_F2, 0xF0, false); db(imm); }
|
void rorx(const Reg32e& r, const Operand& op, uint8 imm) { opGpr(r, op, Reg32e(0, r.getBit()), MM_0F3A | PP_F2, 0xF0, false); db(imm); }
|
||||||
enum { NONE = 256 };
|
enum { NONE = 256 };
|
||||||
CodeGenerator(size_t maxSize = DEFAULT_MAX_CODE_SIZE, void *userPtr = 0, Allocator *allocator = 0)
|
CodeGenerator(size_t maxSize = DEFAULT_MAX_CODE_SIZE, void *userPtr = 0, Allocator *allocator = 0)
|
||||||
|
|
|
@ -365,6 +365,7 @@ void wrmsr() { db(0x0F); db(0x30); }
|
||||||
void xlatb() { db(0xD7); }
|
void xlatb() { db(0xD7); }
|
||||||
void popf() { db(0x9D); }
|
void popf() { db(0x9D); }
|
||||||
void pushf() { db(0x9C); }
|
void pushf() { db(0x9C); }
|
||||||
|
void stac() { db(0x0F); db(0x01); db(0xCB); }
|
||||||
void vzeroall() { db(0xC5); db(0xFC); db(0x77); }
|
void vzeroall() { db(0xC5); db(0xFC); db(0x77); }
|
||||||
void vzeroupper() { db(0xC5); db(0xF8); db(0x77); }
|
void vzeroupper() { db(0xC5); db(0xF8); db(0x77); }
|
||||||
void xgetbv() { db(0x0F); db(0x01); db(0xD0); }
|
void xgetbv() { db(0x0F); db(0x01); db(0xD0); }
|
||||||
|
|
|
@ -150,12 +150,13 @@ public:
|
||||||
tAVX2 = 1 << 20,
|
tAVX2 = 1 << 20,
|
||||||
tBMI1 = 1 << 21, // andn, bextr, blsi, blsmsk, blsr, tzcnt
|
tBMI1 = 1 << 21, // andn, bextr, blsi, blsmsk, blsr, tzcnt
|
||||||
tBMI2 = 1 << 22, // bzhi, mulx, pdep, pext, rorx, sarx, shlx, shrx
|
tBMI2 = 1 << 22, // bzhi, mulx, pdep, pext, rorx, sarx, shlx, shrx
|
||||||
tADX = 1 << 23, // adcx, adox
|
|
||||||
tGPR1 = tBMI1, // backward compatibility
|
|
||||||
tGPR2 = tBMI2, // backward compatibility
|
|
||||||
tLZCNT = 1 << 23,
|
tLZCNT = 1 << 23,
|
||||||
tENHANCED_REP = 1 << 26, // enhanced rep movsb/stosb
|
tENHANCED_REP = 1 << 26, // enhanced rep movsb/stosb
|
||||||
tRDRAND = 1 << 27,
|
tRDRAND = 1 << 27,
|
||||||
|
tADX = 1 << 28, // adcx, adox
|
||||||
|
tRDSEED = 1 << 29, // rdseed
|
||||||
|
tSMAP = 1 << 30, // stac
|
||||||
|
tHLE = 1 << 31, // xacquire, xrelease, xtest
|
||||||
|
|
||||||
tINTEL = 1 << 24,
|
tINTEL = 1 << 24,
|
||||||
tAMD = 1 << 25
|
tAMD = 1 << 25
|
||||||
|
@ -213,7 +214,10 @@ public:
|
||||||
if (data[1] & (1U << 3)) type_ |= tBMI1;
|
if (data[1] & (1U << 3)) type_ |= tBMI1;
|
||||||
if (data[1] & (1U << 8)) type_ |= tBMI2;
|
if (data[1] & (1U << 8)) type_ |= tBMI2;
|
||||||
if (data[1] & (1U << 9)) type_ |= tENHANCED_REP;
|
if (data[1] & (1U << 9)) type_ |= tENHANCED_REP;
|
||||||
|
if (data[1] & (1U << 18)) type_ |= tRDSEED;
|
||||||
if (data[1] & (1U << 19)) type_ |= tADX;
|
if (data[1] & (1U << 19)) type_ |= tADX;
|
||||||
|
if (data[1] & (1U << 20)) type_ |= tSMAP;
|
||||||
|
if (data[1] & (1U << 4)) type_ |= tHLE;
|
||||||
}
|
}
|
||||||
setFamily();
|
setFamily();
|
||||||
}
|
}
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue