add vpmul{dq,hrsw,huw,hw,ld,lw,udq}
This commit is contained in:
parent
603f65e8e8
commit
ae928bca72
3 changed files with 24 additions and 24 deletions
|
@ -1108,14 +1108,14 @@ void put()
|
||||||
{ 0x3A, "pminuw", MM_0F38 | PP_66, true, -1, false, true },
|
{ 0x3A, "pminuw", MM_0F38 | PP_66, true, -1, false, true },
|
||||||
{ 0x3B, "pminud", MM_0F38 | PP_66, true, -1, false, true },
|
{ 0x3B, "pminud", MM_0F38 | PP_66, true, -1, false, true },
|
||||||
|
|
||||||
{ 0xE4, "pmulhuw", MM_0F | PP_66, false, -1, false, true },
|
{ 0xE4, "pmulhuw", MM_0F | PP_66, true, -1, false, true },
|
||||||
{ 0x0B, "pmulhrsw", MM_0F38 | PP_66, false, -1, false, true },
|
{ 0x0B, "pmulhrsw", MM_0F38 | PP_66, true, -1, false, true },
|
||||||
{ 0xE5, "pmulhw", MM_0F | PP_66, false, -1, false, true },
|
{ 0xE5, "pmulhw", MM_0F | PP_66, true, -1, false, true },
|
||||||
{ 0xD5, "pmullw", MM_0F | PP_66, false, -1, false, true },
|
{ 0xD5, "pmullw", MM_0F | PP_66, true, -1, false, true },
|
||||||
{ 0x40, "pmulld", MM_0F38 | PP_66, false, -1, false, true },
|
{ 0x40, "pmulld", MM_0F38 | PP_66, true, -1, false, true },
|
||||||
|
|
||||||
{ 0xF4, "pmuludq", MM_0F | PP_66, false, -1, false, true },
|
{ 0xF4, "pmuludq", MM_0F | PP_66, false, -1, false, true },
|
||||||
{ 0x28, "pmuldq", MM_0F38 | PP_66, false, -1, false, true },
|
{ 0x28, "pmuldq", MM_0F38 | PP_66, true, -1, false, true },
|
||||||
|
|
||||||
{ 0xEB, "por", MM_0F | PP_66, true, -1, false, true },
|
{ 0xEB, "por", MM_0F | PP_66, true, -1, false, true },
|
||||||
{ 0xF6, "psadbw", MM_0F | PP_66, true, -1, false, true },
|
{ 0xF6, "psadbw", MM_0F | PP_66, true, -1, false, true },
|
||||||
|
|
|
@ -1338,14 +1338,14 @@ class Test {
|
||||||
{ "vpminuw", true },
|
{ "vpminuw", true },
|
||||||
{ "vpminud", true },
|
{ "vpminud", true },
|
||||||
|
|
||||||
{ "vpmulhuw", false },
|
{ "vpmulhuw", true },
|
||||||
{ "vpmulhrsw", false },
|
{ "vpmulhrsw", true },
|
||||||
{ "vpmulhw", false },
|
{ "vpmulhw", true },
|
||||||
{ "vpmullw", false },
|
{ "vpmullw", true },
|
||||||
{ "vpmulld", false },
|
{ "vpmulld", true },
|
||||||
|
|
||||||
{ "vpmuludq", false },
|
{ "vpmuludq", false },
|
||||||
{ "vpmuldq", false },
|
{ "vpmuldq", true },
|
||||||
|
|
||||||
{ "vpor", true },
|
{ "vpor", true },
|
||||||
{ "vpsadbw", true },
|
{ "vpsadbw", true },
|
||||||
|
|
|
@ -757,20 +757,20 @@ void vpminuw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(x
|
||||||
void vpminuw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x3A, true, -1); }
|
void vpminuw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x3A, true, -1); }
|
||||||
void vpminud(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x3B, true, -1); }
|
void vpminud(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x3B, true, -1); }
|
||||||
void vpminud(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x3B, true, -1); }
|
void vpminud(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x3B, true, -1); }
|
||||||
void vpmulhuw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xE4, false, -1); }
|
void vpmulhuw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xE4, true, -1); }
|
||||||
void vpmulhuw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xE4, false, -1); }
|
void vpmulhuw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xE4, true, -1); }
|
||||||
void vpmulhrsw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x0B, false, -1); }
|
void vpmulhrsw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x0B, true, -1); }
|
||||||
void vpmulhrsw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x0B, false, -1); }
|
void vpmulhrsw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x0B, true, -1); }
|
||||||
void vpmulhw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xE5, false, -1); }
|
void vpmulhw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xE5, true, -1); }
|
||||||
void vpmulhw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xE5, false, -1); }
|
void vpmulhw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xE5, true, -1); }
|
||||||
void vpmullw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xD5, false, -1); }
|
void vpmullw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xD5, true, -1); }
|
||||||
void vpmullw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xD5, false, -1); }
|
void vpmullw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xD5, true, -1); }
|
||||||
void vpmulld(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x40, false, -1); }
|
void vpmulld(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x40, true, -1); }
|
||||||
void vpmulld(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x40, false, -1); }
|
void vpmulld(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x40, true, -1); }
|
||||||
void vpmuludq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xF4, false, -1); }
|
void vpmuludq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xF4, false, -1); }
|
||||||
void vpmuludq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xF4, false, -1); }
|
void vpmuludq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xF4, false, -1); }
|
||||||
void vpmuldq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x28, false, -1); }
|
void vpmuldq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x28, true, -1); }
|
||||||
void vpmuldq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x28, false, -1); }
|
void vpmuldq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x28, true, -1); }
|
||||||
void vpor(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xEB, true, -1); }
|
void vpor(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xEB, true, -1); }
|
||||||
void vpor(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xEB, true, -1); }
|
void vpor(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xEB, true, -1); }
|
||||||
void vpsadbw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xF6, true, -1); }
|
void vpsadbw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xF6, true, -1); }
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue