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add vpor vpxor

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MITSUNARI Shigeo 2013-05-25 06:02:48 +09:00
parent 05ed6db8de
commit 79dd97a2ff
3 changed files with 8 additions and 8 deletions
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4
gen/gen_code.cpp
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@ -1117,7 +1117,7 @@ void put()
{ 0xF4, "pmuludq", MM_0F | PP_66, false, -1, false, true }, { 0xF4, "pmuludq", MM_0F | PP_66, false, -1, false, true },
{ 0x28, "pmuldq", MM_0F38 | PP_66, false, -1, false, true }, { 0x28, "pmuldq", MM_0F38 | PP_66, false, -1, false, true },
{ 0xEB, "por", MM_0F | PP_66, false, -1, false, true }, { 0xEB, "por", MM_0F | PP_66, true, -1, false, true },
{ 0xF6, "psadbw", MM_0F | PP_66, false, -1, false, true }, { 0xF6, "psadbw", MM_0F | PP_66, false, -1, false, true },
{ 0x00, "pshufb", MM_0F38 | PP_66, false, -1, false, false }, { 0x00, "pshufb", MM_0F38 | PP_66, false, -1, false, false },
@ -1157,7 +1157,7 @@ void put()
{ 0x62, "punpckldq", MM_0F | PP_66, true, -1, false, true }, { 0x62, "punpckldq", MM_0F | PP_66, true, -1, false, true },
{ 0x6C, "punpcklqdq", MM_0F | PP_66, true, -1, false, true }, { 0x6C, "punpcklqdq", MM_0F | PP_66, true, -1, false, true },
{ 0xEF, "pxor", MM_0F | PP_66, false, -1, false, true }, { 0xEF, "pxor", MM_0F | PP_66, true, -1, false, true },
{ 0x53, "rcpss", MM_0F | PP_F3, false, -1, false, true }, { 0x53, "rcpss", MM_0F | PP_F3, false, -1, false, true },
{ 0x52, "rsqrtss", MM_0F | PP_F3, false, -1, false, true }, { 0x52, "rsqrtss", MM_0F | PP_F3, false, -1, false, true },

4
test/make_nm.cpp
View file

@ -1347,7 +1347,7 @@ class Test {
{ "vpmuludq", false }, { "vpmuludq", false },
{ "vpmuldq", false }, { "vpmuldq", false },
{ "vpor", false }, { "vpor", true },
{ "vpsadbw", false }, { "vpsadbw", false },
{ "vpsignb", true }, { "vpsignb", true },
@ -1385,7 +1385,7 @@ class Test {
{ "vpunpckldq", true }, { "vpunpckldq", true },
{ "vpunpcklqdq", true }, { "vpunpcklqdq", true },
{ "vpxor", false }, { "vpxor", true },
{ "vsqrtsd", false }, { "vsqrtsd", false },
{ "vsqrtss", false }, { "vsqrtss", false },

8
xbyak/xbyak_mnemonic.h
View file

@ -771,8 +771,8 @@ void vpmuludq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(
void vpmuludq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xF4, false, -1); } void vpmuludq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xF4, false, -1); }
void vpmuldq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x28, false, -1); } void vpmuldq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x28, false, -1); }
void vpmuldq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x28, false, -1); } void vpmuldq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x28, false, -1); }
void vpor(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xEB, false, -1); } void vpor(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xEB, true, -1); }
void vpor(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xEB, false, -1); } void vpor(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xEB, true, -1); }
void vpsadbw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xF6, false, -1); } void vpsadbw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xF6, false, -1); }
void vpsadbw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xF6, false, -1); } void vpsadbw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xF6, false, -1); }
void vpshufb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x00, false, -1); } void vpshufb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x00, false, -1); }
@ -830,8 +830,8 @@ void vpunpckldq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_X
void vpunpckldq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x62, true, -1); } void vpunpckldq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x62, true, -1); }
void vpunpcklqdq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x6C, true, -1); } void vpunpcklqdq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x6C, true, -1); }
void vpunpcklqdq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x6C, true, -1); } void vpunpcklqdq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x6C, true, -1); }
void vpxor(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xEF, false, -1); } void vpxor(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xEF, true, -1); }
void vpxor(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xEF, false, -1); } void vpxor(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xEF, true, -1); }
void vrcpss(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_F3, 0x53, false, -1); } void vrcpss(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_F3, 0x53, false, -1); }
void vrcpss(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_F3, 0x53, false, -1); } void vrcpss(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_F3, 0x53, false, -1); }
void vrsqrtss(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_F3, 0x52, false, -1); } void vrsqrtss(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_F3, 0x52, false, -1); }