eden-emu/xbyak
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add tpause

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This commit is contained in:
MITSUNARI Shigeo 2022-04-05 14:17:44 +09:00
parent c68646e8de
commit 764d54f6fa
4 changed files with 22 additions and 0 deletions
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1
gen/gen_code.cpp
View file

@ -1085,6 +1085,7 @@ void put()
puts("void rdrand(const Reg& r) { if (r.isBit(8)) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) opModR(Reg(6, Operand::REG, r.getBit()), r, 0x0F, 0xC7); }");
puts("void rdseed(const Reg& r) { if (r.isBit(8)) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) opModR(Reg(7, Operand::REG, r.getBit()), r, 0x0F, 0xC7); }");
puts("void crc32(const Reg32e& reg, const Operand& op) { if (reg.isBit(32) && op.isBit(16)) db(0x66); db(0xF2); opModRM(reg, op, op.isREG(), op.isMEM(), 0x0F, 0x38, 0xF0 | (op.isBit(8) ? 0 : 1)); }");
puts("void tpause(const Reg32& r) { int idx = r.getIdx(); if (idx > 7) XBYAK_THROW(ERR_BAD_PARAMETER) db(0x66); db(0x0F); db(0xAE); setModRM(3, 6, idx); }");
}
{
const struct Tbl {

1
test/make_nm.cpp
View file

@ -1519,6 +1519,7 @@ class Test {
put("pextrq", REG64|MEM, XMM, IMM);
put("pinsrq", XMM, REG64|MEM, IMM);
#endif
}
void putSHA() const
{

19
test/misc.cpp
View file

@ -1890,3 +1890,22 @@ CYBOZU_TEST_AUTO(vaddph)
CYBOZU_TEST_EQUAL_ARRAY(c.getCode(), tbl, n);
}
#endif
CYBOZU_TEST_AUTO(misc)
{
struct Code : Xbyak::CodeGenerator {
Code()
{
tpause(eax);
tpause(ebx);
}
} c;
const uint8_t tbl[] = {
// tpause
0x66, 0x0f, 0xae, 0xf0,
0x66, 0x0f, 0xae, 0xf3,
};
const size_t n = sizeof(tbl) / sizeof(tbl[0]);
CYBOZU_TEST_EQUAL(c.getSize(), n);
CYBOZU_TEST_EQUAL_ARRAY(c.getCode(), tbl, n);
}

1
xbyak/xbyak_mnemonic.h
View file

@ -813,6 +813,7 @@ void subsd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x5C, 0xF2, isXMM
void subss(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x5C, 0xF3, isXMM_XMMorMEM); }
void sysenter() { db(0x0F); db(0x34); }
void sysexit() { db(0x0F); db(0x35); }
void tpause(const Reg32& r) { int idx = r.getIdx(); if (idx > 7) XBYAK_THROW(ERR_BAD_PARAMETER) db(0x66); db(0x0F); db(0xAE); setModRM(3, 6, idx); }
void tzcnt(const Reg&reg, const Operand& op) { opSp1(reg, op, 0xF3, 0x0F, 0xBC); }
void ucomisd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x2E, 0x66, isXMM_XMMorMEM); }
void ucomiss(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x2E, 0x100, isXMM_XMMorMEM); }