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add vpshufb, vshufpd, vshufps, vpshufd, vpshufhw, vpshuflw

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MITSUNARI Shigeo 2016-07-13 12:41:43 +09:00
parent 976807c287
commit 676a6def7f
3 changed files with 31 additions and 12 deletions
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12
gen/gen_code.cpp
View file

@ -1117,7 +1117,7 @@ void put()
{ 0xEB, "por", T_0F | T_66 | T_YMM, false, true },
{ 0xF6, "psadbw", T_0F | T_66 | T_YMM, false, true },
{ 0x00, "pshufb", T_0F38 | T_66 | T_YMM, false, false },
{ 0x00, "pshufb", T_0F38 | T_66 | T_YMM | T_EVEX, false, false },
{ 0x08, "psignb", T_0F38 | T_66 | T_YMM, false, true },
{ 0x09, "psignw", T_0F38 | T_66 | T_YMM, false, true },
@ -1159,8 +1159,8 @@ void put()
{ 0x53, "rcpss", T_0F | T_F3, false, true },
{ 0x52, "rsqrtss", T_0F | T_F3, false, true },
{ 0xC6, "shufpd", T_0F | T_66 | T_YMM, true, true },
{ 0xC6, "shufps", T_0F | T_YMM, true, true },
{ 0xC6, "shufpd", T_0F | T_66 | T_YMM | T_EVEX | T_EW1 | T_B64, true, true },
{ 0xC6, "shufps", T_0F | T_YMM | T_EVEX | T_EW0 | T_B32, true, true },
{ 0x51, "sqrtsd", T_0F | T_F2 | T_EVEX | T_EW1 | T_ER_X, false, true },
{ 0x51, "sqrtss", T_0F | T_F3 | T_EVEX | T_EW0 | T_ER_X, false, true },
@ -1233,9 +1233,9 @@ void put()
{ 0x34, "pmovzxwq", T_0F38 | T_66 | T_YMM, false },
{ 0x35, "pmovzxdq", T_0F38 | T_66 | T_YMM, false },
{ 0x70, "pshufd", T_0F | T_66 | T_YMM, true },
{ 0x70, "pshufhw", T_0F | T_F3 | T_YMM, true },
{ 0x70, "pshuflw", T_0F | T_F2 | T_YMM, true },
{ 0x70, "pshufd", T_0F | T_66 | T_YMM | T_EVEX | T_EW0 | T_B32, true },
{ 0x70, "pshufhw", T_0F | T_F3 | T_YMM | T_EVEX, true },
{ 0x70, "pshuflw", T_0F | T_F2 | T_YMM | T_EVEX, true },
{ 0x17, "ptest", T_0F38 | T_66, false },
{ 0x53, "rcpps", T_0F | T_YMM, false },

19
test/make_nm.cpp
View file

@ -2871,6 +2871,19 @@ public:
{ "vpsrlvq", XMM_KZ | _XMM, _XMM, _XMM },
{ "vpsrlvq", _ZMM, _ZMM, M_1to8 },
{ "vpshufb", _XMM | XMM_KZ, _XMM, _XMM },
{ "vpshufb", ZMM_KZ, _ZMM, _MEM },
{ "vpshufhw", _XMM | XMM_KZ, _XMM, IMM8 },
{ "vpshufhw", ZMM_KZ, _MEM, IMM8 },
{ "vpshuflw", _XMM | XMM_KZ, _XMM, IMM8 },
{ "vpshuflw", ZMM_KZ, _MEM, IMM8 },
{ "vpshufd", _XMM | XMM_KZ, _XMM | M_1to4, IMM8 },
{ "vpshufd", _ZMM | ZMM_KZ, _ZMM | M_1to16, IMM8 },
};
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
const Tbl& p = tbl[i];
@ -2888,6 +2901,12 @@ public:
} tbl[] = {
#ifdef XBYAK64
{ "vinsertps", _XMM, _XMM, _XMM3 },
{ "vshufpd", XMM_KZ, _XMM, M_1to2 },
{ "vshufpd", ZMM_KZ, _ZMM, M_1to8 },
{ "vshufps", XMM_KZ, _XMM, M_1to4 },
{ "vshufps", ZMM_KZ, _ZMM, M_1to16 },
#endif
{ "vpalignr", ZMM_KZ, _ZMM, _ZMM },
};

12
xbyak/xbyak_mnemonic.h
View file

@ -885,7 +885,7 @@ void vpor(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2
void vpor(const Xmm& x, const Operand& op) { vpor(x, x, op); }
void vpsadbw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F | T_66 | T_YMM, 0xF6); }
void vpsadbw(const Xmm& x, const Operand& op) { vpsadbw(x, x, op); }
void vpshufb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F38 | T_66 | T_YMM, 0x00); }
void vpshufb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F38 | T_66 | T_YMM | T_EVEX, 0x00); }
void vpsignb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F38 | T_66 | T_YMM, 0x08); }
void vpsignb(const Xmm& x, const Operand& op) { vpsignb(x, x, op); }
void vpsignw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F38 | T_66 | T_YMM, 0x09); }
@ -946,9 +946,9 @@ void vrcpss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1,
void vrcpss(const Xmm& x, const Operand& op) { vrcpss(x, x, op); }
void vrsqrtss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F | T_F3, 0x52); }
void vrsqrtss(const Xmm& x, const Operand& op) { vrsqrtss(x, x, op); }
void vshufpd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8 imm) { opAVX_X_X_XM(x1, x2, op, T_0F | T_66 | T_YMM, 0xC6, imm); }
void vshufpd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8 imm) { opAVX_X_X_XM(x1, x2, op, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_B64, 0xC6, imm); }
void vshufpd(const Xmm& x, const Operand& op, uint8 imm) { vshufpd(x, x, op, imm); }
void vshufps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8 imm) { opAVX_X_X_XM(x1, x2, op, T_0F | T_YMM, 0xC6, imm); }
void vshufps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8 imm) { opAVX_X_X_XM(x1, x2, op, T_0F | T_EW0 | T_YMM | T_EVEX | T_B32, 0xC6, imm); }
void vshufps(const Xmm& x, const Operand& op, uint8 imm) { vshufps(x, x, op, imm); }
void vsqrtsd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F | T_F2 | T_EW1 | T_EVEX | T_ER_X, 0x51); }
void vsqrtsd(const Xmm& x, const Operand& op) { vsqrtsd(x, x, op); }
@ -1003,9 +1003,9 @@ void vpmovzxbq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F38
void vpmovzxwd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F38 | T_66 | T_YMM, 0x33); }
void vpmovzxwq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F38 | T_66 | T_YMM, 0x34); }
void vpmovzxdq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F38 | T_66 | T_YMM, 0x35); }
void vpshufd(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, T_0F | T_66 | T_YMM, 0x70, imm); }
void vpshufhw(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, T_0F | T_F3 | T_YMM, 0x70, imm); }
void vpshuflw(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, T_0F | T_F2 | T_YMM, 0x70, imm); }
void vpshufd(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, T_0F | T_66 | T_EW0 | T_YMM | T_EVEX | T_B32, 0x70, imm); }
void vpshufhw(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, T_0F | T_F3 | T_YMM | T_EVEX, 0x70, imm); }
void vpshuflw(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, T_0F | T_F2 | T_YMM | T_EVEX, 0x70, imm); }
void vptest(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F38 | T_66, 0x17); }
void vrcpps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F | T_YMM, 0x53); }
void vrsqrtps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F | T_YMM, 0x52); }