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add vcvtsh2usi

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This commit is contained in:
MITSUNARI Shigeo 2021-09-14 10:02:46 +09:00
parent 34abda5c5f
commit 621e6548c1
3 changed files with 12 additions and 0 deletions
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1
gen/gen_avx512.cpp
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@ -547,6 +547,7 @@ void putCvt()
{ 0x78, "vcvttsd2usi", T_F2 | T_0F | T_MUST_EVEX | T_N8 | T_SAE_X, 0 },
{ 0x78, "vcvttss2usi", T_F3 | T_0F | T_MUST_EVEX | T_N4 | T_SAE_X, 0 },
{ 0x2D, "vcvtsh2si", T_F3 | T_MAP5 | T_MUST_EVEX | T_N2 | T_ER_X, 0 },
{ 0x79, "vcvtsh2usi", T_F3 | T_MAP5 | T_MUST_EVEX | T_N2 | T_ER_X, 0 },
{ 0x7B, "vcvtps2qq", T_66 | T_0F | T_YMM | T_MUST_EVEX | T_EW0 | T_B32 | T_N8 | T_N_VL | T_ER_Y, 1 },
{ 0x79, "vcvtps2uqq", T_66 | T_0F | T_YMM | T_MUST_EVEX | T_EW0 | T_B32 | T_N8 | T_N_VL | T_ER_Y, 1 },

10
test/misc.cpp
View file

@ -1292,6 +1292,10 @@ CYBOZU_TEST_AUTO(vaddph)
vcvtps2ph(ymm1|k2|T_sae, zmm5, 0x9);
vcvtps2ph(ptr [rax+0x40]|k5, zmm4, 0xa);
vcvtsh2usi(ecx|T_rd_sae, xmm1);
vcvtsh2usi(eax, ptr [rax+0x40]);
vcvtsh2usi(r9|T_rd_sae, xmm1);
vcvtsh2usi(r13, ptr [rax+0x40]);
}
} c;
const uint8_t tbl[] = {
@ -1782,6 +1786,12 @@ CYBOZU_TEST_AUTO(vaddph)
0x62, 0xf3, 0x7d, 0x2a, 0x1d, 0x68, 0x04, 0x08,
0x62, 0xf3, 0x7d, 0x1a, 0x1d, 0xe9, 0x09,
0x62, 0xf3, 0x7d, 0x4d, 0x1d, 0x60, 0x02, 0x0a,
// vcvtsh2usi
0x62, 0xf5, 0x7e, 0x38, 0x79, 0xc9,
0x62, 0xf5, 0x7e, 0x08, 0x79, 0x40, 0x20,
0x62, 0x75, 0xfe, 0x38, 0x79, 0xc9,
0x62, 0x75, 0xfe, 0x08, 0x79, 0x68, 0x20,
};
const size_t n = sizeof(tbl) / sizeof(tbl[0]);
CYBOZU_TEST_EQUAL(c.getSize(), n);

1
xbyak/xbyak_mnemonic.h
View file

@ -1923,6 +1923,7 @@ void vcvtsd2usi(const Reg32e& r, const Operand& op) { int type = (T_N8 | T_F2 |
void vcvtsh2sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2 | T_F3 | T_MAP5 | T_EW0 | T_SAE_X | T_MUST_EVEX, 0x5A); }
void vcvtsh2si(const Reg32e& r, const Operand& op) { int type = (T_N2 | T_F3 | T_MAP5 | T_ER_X | T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x2D); }
void vcvtsh2ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2 | T_MAP6 | T_EW0 | T_SAE_X | T_MUST_EVEX, 0x13); }
void vcvtsh2usi(const Reg32e& r, const Operand& op) { int type = (T_N2 | T_F3 | T_MAP5 | T_ER_X | T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x79); }
void vcvtss2sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4 | T_MAP5 | T_EW0 | T_ER_X | T_MUST_EVEX, 0x1D); }
void vcvtss2usi(const Reg32e& r, const Operand& op) { int type = (T_N4 | T_F3 | T_0F | T_ER_X | T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x79); }
void vcvttpd2qq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66 | T_0F | T_EW1 | T_YMM | T_SAE_Z | T_MUST_EVEX | T_B64, 0x7A); }