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blsmsk, blsr support apx

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MITSUNARI Shigeo 2023-11-10 11:54:54 +09:00
parent a493dc7b48
commit 5bb8461b43
3 changed files with 27 additions and 4 deletions
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4
gen/gen_code.cpp
View file

@ -1770,8 +1770,8 @@ void put()
uint8_t idx;
} tbl[] = {
{ "blsi", T_0F38 | T_VEX|T_NF, 0xF3, 3 },
{ "blsmsk", T_0F38, 0xF3, 2 },
{ "blsr", T_0F38, 0xF3, 1 },
{ "blsmsk", T_0F38 | T_VEX|T_NF, 0xF3, 2 },
{ "blsr", T_0F38 | T_VEX|T_NF, 0xF3, 1 },
};
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
const Tbl& p = tbl[i];

23
test/apx.cpp
View file

@ -546,6 +546,17 @@ CYBOZU_TEST_AUTO(bextr_etc)
blsi(r30|T_nf, r31);
blsi(ecx, r17d);
blsi(r30, ptr [r31+r20*4]);
blsmsk(r30, r31);
blsmsk(r30|T_nf, r31);
blsmsk(ecx, r17d);
blsmsk(r30, ptr [r31+r20*4]);
blsr(r30, r31);
blsr(r30|T_nf, r31);
blsr(ecx, r17d);
blsr(r30, ptr [r31+r20*4]);
}
} c;
const uint8_t tbl[] = {
@ -582,6 +593,18 @@ CYBOZU_TEST_AUTO(bextr_etc)
0x62, 0xfa, 0x74, 0x08, 0xf3, 0xd9,
0x62, 0xda, 0x88, 0x00, 0xf3, 0x1c, 0xa7,
// blsmsk
0x62, 0xda, 0x8c, 0x00, 0xf3, 0xd7,
0x62, 0xda, 0x8c, 0x04, 0xf3, 0xd7,
0x62, 0xfa, 0x74, 0x08, 0xf3, 0xd1,
0x62, 0xda, 0x88, 0x00, 0xf3, 0x14, 0xa7,
// blsr
0x62, 0xda, 0x8c, 0x00, 0xf3, 0xcf,
0x62, 0xda, 0x8c, 0x04, 0xf3, 0xcf,
0x62, 0xfa, 0x74, 0x08, 0xf3, 0xc9,
0x62, 0xda, 0x88, 0x00, 0xf3, 0x0c, 0xa7,
};
const size_t n = sizeof(tbl);
CYBOZU_TEST_EQUAL(c.getSize(), n);

4
xbyak/xbyak_mnemonic.h
View file

@ -42,8 +42,8 @@ void blendps(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 |
void blendvpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38, 0x15, isXMM_XMMorMEM, NONE); }
void blendvps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38, 0x14, isXMM_XMMorMEM, NONE); }
void blsi(const Reg32e& r, const Operand& op) { opRRO(Reg32e(3, r.getBit()), r, op, T_VEX|T_0F38|T_NF, 0xf3); }
void blsmsk(const Reg32e& r, const Operand& op) { opRRO(Reg32e(2, r.getBit()), r, op, T_0F38, 0xf3); }
void blsr(const Reg32e& r, const Operand& op) { opRRO(Reg32e(1, r.getBit()), r, op, T_0F38, 0xf3); }
void blsmsk(const Reg32e& r, const Operand& op) { opRRO(Reg32e(2, r.getBit()), r, op, T_VEX|T_0F38|T_NF, 0xf3); }
void blsr(const Reg32e& r, const Operand& op) { opRRO(Reg32e(1, r.getBit()), r, op, T_VEX|T_0F38|T_NF, 0xf3); }
void bnd() { db(0xF2); }
void bndcl(const BoundsReg& bnd, const Operand& op) { opRext(op, i32e, bnd.getIdx(), T_F3 | T_0F, 0x1A, !op.isMEM()); }
void bndcn(const BoundsReg& bnd, const Operand& op) { opRext(op, i32e, bnd.getIdx(), T_F2 | T_0F, 0x1B, !op.isMEM()); }