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add vcvttsh2usi

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This commit is contained in:
MITSUNARI Shigeo 2021-09-14 10:37:48 +09:00
parent 05d08e05b3
commit 4e72a9dc49
3 changed files with 13 additions and 0 deletions
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1
gen/gen_avx512.cpp
View file

@ -549,6 +549,7 @@ void putCvt()
{ 0x2D, "vcvtsh2si", T_F3 | T_MAP5 | T_MUST_EVEX | T_N2 | T_ER_X, 0 },
{ 0x79, "vcvtsh2usi", T_F3 | T_MAP5 | T_MUST_EVEX | T_N2 | T_ER_X, 0 },
{ 0x2C, "vcvttsh2si", T_F3 | T_MAP5 | T_MUST_EVEX | T_EW0 | T_N2 | T_SAE_X, 0 },
{ 0x78, "vcvttsh2usi", T_F3 | T_MAP5 | T_MUST_EVEX | T_EW0 | T_N2 | T_SAE_X, 0 },
{ 0x7B, "vcvtps2qq", T_66 | T_0F | T_YMM | T_MUST_EVEX | T_EW0 | T_B32 | T_N8 | T_N_VL | T_ER_Y, 1 },
{ 0x79, "vcvtps2uqq", T_66 | T_0F | T_YMM | T_MUST_EVEX | T_EW0 | T_B32 | T_N8 | T_N_VL | T_ER_Y, 1 },

11
test/misc.cpp
View file

@ -1301,6 +1301,11 @@ CYBOZU_TEST_AUTO(vaddph)
vcvttsh2si(eax, ptr [rax+0x40]);
vcvttsh2si(r9|T_sae, xmm1);
vcvttsh2si(r13, ptr [rax+0x40]);
vcvttsh2usi(ecx|T_sae, xmm1);
vcvttsh2usi(eax, ptr [rax+0x40]);
vcvttsh2usi(r9|T_sae, xmm1);
vcvttsh2usi(r13, ptr [rax+0x40]);
}
} c;
const uint8_t tbl[] = {
@ -1803,6 +1808,12 @@ CYBOZU_TEST_AUTO(vaddph)
0x62, 0xf5, 0x7e, 0x08, 0x2c, 0x40, 0x20,
0x62, 0x75, 0xfe, 0x18, 0x2c, 0xc9,
0x62, 0x75, 0xfe, 0x08, 0x2c, 0x68, 0x20,
// vcvttsh2usi
0x62, 0xf5, 0x7e, 0x18, 0x78, 0xc9,
0x62, 0xf5, 0x7e, 0x08, 0x78, 0x40, 0x20,
0x62, 0x75, 0xfe, 0x18, 0x78, 0xc9,
0x62, 0x75, 0xfe, 0x08, 0x78, 0x68, 0x20,
};
const size_t n = sizeof(tbl) / sizeof(tbl[0]);
CYBOZU_TEST_EQUAL(c.getSize(), n);

1
xbyak/xbyak_mnemonic.h
View file

@ -1939,6 +1939,7 @@ void vcvttps2udq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_0F |
void vcvttps2uqq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8 | T_N_VL | T_66 | T_0F | T_EW0 | T_YMM | T_SAE_Y | T_MUST_EVEX | T_B32, 0x78); }
void vcvttsd2usi(const Reg32e& r, const Operand& op) { int type = (T_N8 | T_F2 | T_0F | T_SAE_X | T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x78); }
void vcvttsh2si(const Reg32e& r, const Operand& op) { int type = (T_N2 | T_F3 | T_MAP5 | T_EW0 | T_SAE_X | T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x2C); }
void vcvttsh2usi(const Reg32e& r, const Operand& op) { int type = (T_N2 | T_F3 | T_MAP5 | T_EW0 | T_SAE_X | T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x78); }
void vcvttss2usi(const Reg32e& r, const Operand& op) { int type = (T_N4 | T_F3 | T_0F | T_SAE_X | T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x78); }
void vcvtudq2pd(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8 | T_N_VL | T_F3 | T_0F | T_EW0 | T_YMM | T_MUST_EVEX | T_B32, 0x7A); }
void vcvtudq2ph(const Xmm& x, const Operand& op) { checkCvt4(x, op); opCvt(x, op, T_N16 | T_N_VL | T_F2 | T_MAP5 | T_EW0 | T_ER_Z | T_MUST_EVEX | T_B32, 0x7A); }