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add vcvtsi2sh

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This commit is contained in:
MITSUNARI Shigeo 2021-09-14 14:29:33 +09:00
parent cfc03cb8f9
commit 16d9898ab9
5 changed files with 24 additions and 2 deletions
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6
gen/avx_type.hpp
View file

@ -15,7 +15,7 @@
T_66 = 1 << 5, // pp = 1
T_F3 = 1 << 6, // pp = 2
T_F2 = T_66 | T_F3, // pp = 3
// 1 << 7, not used
T_ER_R = 1 << 7, // reg{er}
T_0F = 1 << 8,
T_0F38 = 1 << 9,
T_0F3A = 1 << 10,
@ -143,6 +143,10 @@ std::string type2String(int type)
if (!str.empty()) str += " | ";
str += "T_ER_Z";
}
if (type & T_ER_R) {
if (!str.empty()) str += " | ";
str += "T_ER_R";
}
if (type & T_SAE_X) {
if (!str.empty()) str += " | ";
str += "T_SAE_X";

5
gen/gen_avx512.cpp
View file

@ -580,6 +580,8 @@ void putCvt()
{ 0x5A, "vcvtpd2ph", T_66 | T_MAP5 | T_MUST_EVEX | T_EW1 | T_B64 | T_ER_Z | T_N16 | T_N_VL, 5 },
{ 0x5B, "vcvtqq2ph", T_MAP5 | T_MUST_EVEX | T_EW1 | T_B64 | T_ER_Z | T_N16 | T_N_VL, 5 },
{ 0x7A, "vcvtuqq2ph", T_F2 | T_MAP5 | T_MUST_EVEX | T_EW1 | T_B64 | T_ER_Z | T_N16 | T_N_VL, 5 },
{ 0x2A, "vcvtsi2sh", T_F3 | T_MAP5 | T_MUST_EVEX | T_ER_R | T_M_K, 6 },
};
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
const Tbl& p = tbl[i];
@ -603,6 +605,9 @@ void putCvt()
case 5:
printf("void %s(const Xmm& x, const Operand& op) { opCvt5(x, op, %s, 0x%02X); }\n", p.name, type.c_str(), p.code);
break;
case 6:
printf("void %s(const Xmm& x1, const Xmm& x2, const Operand& op) { if (!(x1.isXMM() && x2.isXMM() && op.isBit(32|64))) XBYAK_THROW(ERR_BAD_COMBINATION) int type = (%s) | (op.isBit(32) ? (T_EW0 | T_N4) : (T_EW1 | T_N8)); opVex(x1, &x2, op, type, 0x%02X); }\n", p.name, type.c_str(), p.code);
break;
}
}
puts("void vcvtusi2sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opCvt3(x1, x2, op, T_F2 | T_0F | T_MUST_EVEX, T_W1 | T_EW1 | T_ER_X | T_N8, T_W0 | T_EW0 | T_N4, 0x7B); }");

11
test/misc.cpp
View file

@ -1316,6 +1316,11 @@ CYBOZU_TEST_AUTO(vaddph)
vcvttph2qq(zmm1|k5|T_z|T_sae, xmm3);
vcvttph2qq(zmm1|k5|T_z, ptr [rax+0x40]);
vcvttph2qq(zmm1|k5|T_z, ptr_b [rax+0x40]);
vcvtsi2sh(xmm1|T_rd_sae, xmm2, eax);
vcvtsi2sh(xmm1, xmm2, dword [rax+0x40]);
vcvtsi2sh(xmm1|T_rd_sae, xmm2, r9);
vcvtsi2sh(xmm1, xmm2, qword [rax+0x40]);
}
} c;
const uint8_t tbl[] = {
@ -1835,6 +1840,12 @@ CYBOZU_TEST_AUTO(vaddph)
0x62, 0xf5, 0x7d, 0x9d, 0x7a, 0xcb,
0x62, 0xf5, 0x7d, 0xcd, 0x7a, 0x48, 0x04,
0x62, 0xf5, 0x7d, 0xdd, 0x7a, 0x48, 0x20,
// vcvtsi2sh
0x62, 0xf5, 0x6e, 0x38, 0x2a, 0xc8,
0x62, 0xf5, 0x6e, 0x08, 0x2a, 0x48, 0x10,
0x62, 0xd5, 0xee, 0x38, 0x2a, 0xc9,
0x62, 0xf5, 0xee, 0x08, 0x2a, 0x48, 0x08,
};
const size_t n = sizeof(tbl) / sizeof(tbl[0]);
CYBOZU_TEST_EQUAL(c.getSize(), n);

3
xbyak/xbyak.h
View file

@ -1655,7 +1655,7 @@ private:
T_66 = 1 << 5, // pp = 1
T_F3 = 1 << 6, // pp = 2
T_F2 = T_66 | T_F3, // pp = 3
// 1 << 7, not used
T_ER_R = 1 << 7, // reg{er}
T_0F = 1 << 8,
T_0F38 = 1 << 9,
T_0F3A = 1 << 10,
@ -1712,6 +1712,7 @@ private:
}
void verifyER(const Reg& r, int type) const
{
if ((type & T_ER_R) && r.isREG(32|64)) return;
if (((type & T_ER_X) && r.isXMM()) || ((type & T_ER_Y) && r.isYMM()) || ((type & T_ER_Z) && r.isZMM())) return;
XBYAK_THROW(ERR_ER_IS_INVALID)
}

1
xbyak/xbyak_mnemonic.h
View file

@ -1924,6 +1924,7 @@ void vcvtsh2sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x
void vcvtsh2si(const Reg32e& r, const Operand& op) { int type = (T_N2 | T_F3 | T_MAP5 | T_ER_X | T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x2D); }
void vcvtsh2ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2 | T_MAP6 | T_EW0 | T_SAE_X | T_MUST_EVEX, 0x13); }
void vcvtsh2usi(const Reg32e& r, const Operand& op) { int type = (T_N2 | T_F3 | T_MAP5 | T_ER_X | T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x79); }
void vcvtsi2sh(const Xmm& x1, const Xmm& x2, const Operand& op) { if (!(x1.isXMM() && x2.isXMM() && op.isBit(32|64))) XBYAK_THROW(ERR_BAD_COMBINATION) int type = (T_F3 | T_MAP5 | T_ER_R | T_MUST_EVEX | T_M_K) | (op.isBit(32) ? (T_EW0 | T_N4) : (T_EW1 | T_N8)); opVex(x1, &x2, op, type, 0x2A); }
void vcvtss2sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4 | T_MAP5 | T_EW0 | T_ER_X | T_MUST_EVEX, 0x1D); }
void vcvtss2usi(const Reg32e& r, const Operand& op) { int type = (T_N4 | T_F3 | T_0F | T_ER_X | T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x79); }
void vcvttpd2qq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66 | T_0F | T_EW1 | T_YMM | T_SAE_Z | T_MUST_EVEX | T_B64, 0x7A); }