Commit graph

6 commits

Author SHA1 Message Date
Radu Velea
bb0e1e0d6f Naming convention for AVX
Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
2015-11-05 01:23:03 -08:00
Jonathan Lennox
43120f0075 Reorganize x86 SSE intrinsics code.
Enable x86 intrinsics when building in floating-point mode.
Support SSE as an arch value.
Use RTCD to conditionally enable existing floating-point Celt SSE code.
Call functions directly (without RTCD) when their architecture can be presumed.
Use SSE4.1 intrinsics optimized code for Silk even in floating-point mode.
2015-09-01 17:21:31 -04:00
Jonathan Lennox
1d60b49e9d In optimized mode, don't force Clang to use explicit load/store for _mm_cvtepi16_epi32, only for _mm_cvtepi8_epi32. Adjust comment accordingly. 2015-09-01 17:21:31 -04:00
Timothy B. Terriberry
2d83e7e297 Wrap _mm_cvtepi...() intrinsics in macros on clang.
We already needed these macros for gcc with optimizations disabled,
 but it appears clang needs them all the time.

Thanks to Jonathan Lennox for the report.
2015-02-27 11:11:57 -08:00
Timothy B. Terriberry
7422189ab1 Fix silk_VQ_WMat_EC_sse4_1().
During review of c95c9a048f, I replaced a call to
 _mm_cvtepi8_epi32() with the OP_CVTEPI16_EPI32_M64() macro (note
 the 16 instead of 8).
Make a separate OP_CVTEPI8_EPI32_M32() macro and use that instead.

Thaks to Wei Zhou for the report.
2015-01-02 16:16:21 -08:00
xiangmingzhu
c95c9a048f Cisco optimization for x86 & fixed point
1. Only for fixed point on x86 platform (32bit and 64bit, uses SIMD
   intrinsics up to SSE4.2)
2. Use "configure --enable-fixed-point --enable-intrinsics" to enable
   optimization, default is disabled.
3. Official test cases are verified and passed.

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
2014-10-03 21:16:00 -04:00