08fa8da77c
Andreas Ertelt The problem in question is caused by changeset 7771 (http://hg.libsdl.org/SDL/rev/5486e579872e / https://bugzilla.libsdl.org/show_bug.cgi?id=2121) The redefinition of __inline__ (introduced by the addition of begin_code.h:128's "|| __STRICT_ANSI__") results in mingw's gcc throwing multiple warning: always_inline function might not be inlinable [-Wattributes] as well as a whole bunch of redefinitions of mingw internals which break linking of projects including the SDL2 headers.
118 lines
3.6 KiB
C
118 lines
3.6 KiB
C
/*
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Simple DirectMedia Layer
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Copyright (C) 1997-2013 Sam Lantinga <slouken@libsdl.org>
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This software is provided 'as-is', without any express or implied
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warranty. In no event will the authors be held liable for any damages
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arising from the use of this software.
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Permission is granted to anyone to use this software for any purpose,
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including commercial applications, and to alter it and redistribute it
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freely, subject to the following restrictions:
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1. The origin of this software must not be misrepresented; you must not
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claim that you wrote the original software. If you use this software
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in a product, an acknowledgment in the product documentation would be
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appreciated but is not required.
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2. Altered source versions must be plainly marked as such, and must not be
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misrepresented as being the original software.
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3. This notice may not be removed or altered from any source distribution.
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*/
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#include "SDL_config.h"
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#include "SDL_atomic.h"
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/* Note that we undefine the atomic operations here, in case they are
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defined as compiler intrinsics while building SDL but the library user
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doesn't have that compiler. That way we always have a working set of
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atomic operations built into the library.
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*/
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#undef SDL_AtomicCAS
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#undef SDL_AtomicCASPtr
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/*
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If any of the operations are not provided then we must emulate some
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of them. That means we need a nice implementation of spin locks
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that avoids the "one big lock" problem. We use a vector of spin
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locks and pick which one to use based on the address of the operand
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of the function.
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To generate the index of the lock we first shift by 3 bits to get
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rid on the zero bits that result from 32 and 64 bit allignment of
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data. We then mask off all but 5 bits and use those 5 bits as an
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index into the table.
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Picking the lock this way insures that accesses to the same data at
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the same time will go to the same lock. OTOH, accesses to different
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data have only a 1/32 chance of hitting the same lock. That should
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pretty much eliminate the chances of several atomic operations on
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different data from waiting on the same "big lock". If it isn't
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then the table of locks can be expanded to a new size so long as
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the new size is a power of two.
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Contributed by Bob Pendleton, bob@pendleton.com
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*/
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static SDL_SpinLock locks[32];
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static SDL_INLINE void
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enterLock(void *a)
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{
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uintptr_t index = ((((uintptr_t)a) >> 3) & 0x1f);
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SDL_AtomicLock(&locks[index]);
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}
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static SDL_INLINE void
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leaveLock(void *a)
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{
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uintptr_t index = ((((uintptr_t)a) >> 3) & 0x1f);
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SDL_AtomicUnlock(&locks[index]);
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}
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DECLSPEC SDL_bool SDLCALL
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SDL_AtomicCAS(SDL_atomic_t *a, int oldval, int newval)
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{
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SDL_bool retval = SDL_FALSE;
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enterLock(a);
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if (a->value == oldval) {
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a->value = newval;
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retval = SDL_TRUE;
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}
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leaveLock(a);
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return retval;
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}
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DECLSPEC SDL_bool SDLCALL
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SDL_AtomicCASPtr(void **a, void *oldval, void *newval)
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{
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SDL_bool retval = SDL_FALSE;
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enterLock(a);
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if (*a == oldval) {
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*a = newval;
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retval = SDL_TRUE;
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}
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leaveLock(a);
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return retval;
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}
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#if defined(__GNUC__) && defined(__arm__) && \
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(defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6T2__) || defined(__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6ZK__))
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__asm__(
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" .align 2\n"
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" .globl _SDL_MemoryBarrierRelease\n"
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" .globl _SDL_MemoryBarrierAcquire\n"
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"_SDL_MemoryBarrierRelease:\n"
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"_SDL_MemoryBarrierAcquire:\n"
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" mov r0, #0\n"
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" mcr p15, 0, r0, c7, c10, 5\n"
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" bx lr\n"
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);
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#endif /* __GNUC__ && __arm__ && ARMV6 */
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/* vi: set ts=4 sw=4 expandtab: */
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